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3 Volt Intel(R) Advanced+ Boot Block Flash Memory
28F800C3, 28F160C3, 28F320C3, 28F640C3
Specification Update November 2002
Notice: The 28F800C3, 28F160C3, 28F320C3, 28F640C3 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update. Order Number: 297938-014
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The 28F800C3, 28F160C3, 28F320C3, 28F640C3 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800548-4725 or by visiting Intel's website at http://www.intel.com. Copyright (c) Intel Corporation, 2002. *Other names and brands may be claimed as the property of others.
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28F800C3, 28F160C3, 28F320C3, 28F640C3, 28F640C3 Specification Update
Contents
Revision History ......................................................................................... 5 Preface....................................................................................................... 6 Summary Table of Changes....................................................................... 7 Identification Information............................................................................ 9 Errata ....................................................................................................... 10 Specification Changes ............................................................................. 15 Specification Clarifications ....................................................................... 17 Documentation Changes ......................................................................... 17
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update 3
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
Revision History
Date 05/13/98
Version -001
Description Document includes all known specifications to date (original version). Changed Ordering Information for 32-Mbit densities to 95 ns and 115 ns available access speed only
06/02/98
-002
Added BGA* package mark clarification Added test condition clarification for IPPD Added specification change for BGA* package pinout Added Errata for Maximum ICCD Change Added Specification Change for Byte-Wide Protection Register Addressing Added CFI Primary-Vendor Specific Extended Query Change Added Block Locking Command Sequence Change VIH Maximum Specification Change Removed 48-Lead TSOP Package Pinout Change (fixed in 290645-002) Removed Protection Register Addressing Change (fixed in 290645-002) Removed CFI Query Structure Output Table Change (fixed in 290645-002) Removed Ordering Information Change (fixed in 290645-002) Removed BGA* Package Pinout Change (fixed in 290645-002) Removed Protection Register Addressing Clarification (fixed in 290645-002) Removed BGA* Package Mark Clarification (fixed in 290645-002) Removed Byte-Wide Protection Register Addressing Change (fixed in 290645003)
07/08/98 08/12/98 09/09/98
-003 -004 -005
09/24/98
-006
10/02/98
-007
Removed VIH Maximum Change (fixed in 290645-003) Removed IPPD Test Condition Clarification (fixed in 290645-003) Name changed from 3 Volt Advanced+ Boot Block Flash Memory Family Added Specification Change #1, Maximum ICCD Change Added Specification Change #2, CFI Primary-Vendor Specific Extended Query Change
05/04/99
-008
Added Specification Change #3, Block Locking Command Sequence Change Added Specification Change #4, 32-Mb Maximum VCC Change Updated CFI feature identification bit definition Renamed Specification Change #4, 32-Mb Maximum VCC Change, to 0.25m 32-Mb Maximum VCC Change, and modified it to indicate that the affected product is the 32-Mb product on the 0.25m process Revised Erratum #1, Maximum ICCE when VPP=12 V Added Erratum #2, 28F320C3xC Reset Failure Updated Erratum #2, 28F320C3xC Reset Failure, added 3.3v Vcc max Added Erratum #3, 28F640C3xC for Maximum ICCD / ICCS Change Added Erratum #4, 28F160C3xC Erase Resume Issue Added Erratum #5, 28F160C3xC and 28F640C3xC Lock/Unlock/Lock-Down Operation
10/05/00
-009
05/03/01 07/23/01 11/05/01 3/05/02 11/21/02
-010 -011 -012 -013 -014
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
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Preface
Preface
This document is an update to the specifications contained in the Affected Documents/Related Documents table below. This document is a compilation of device and documentation errata, specification clarifications and changes. It is intended for hardware system manufacturers and software developers of applications, operating systems, or tools. Information types defined in Nomenclature are consolidated into the specification update and are no longer published in other documents. This document may also contain information that was not previously published.
Affected Documents/Related Documents
Title
3 Volt Intel(R) Advanced+ Boot Block Flash Memory, 28F800C3, 28F160C3, 28F320C3, 28F640C3 (x16) Datasheet
Order
290645-014
Nomenclature
Errata are design defects or errors. These may cause the behavior of the 28F800C3, 28F160C3, 28F320C3, 28F640C3 to deviate from published specifications. Hardware and software designed to be used with any given stepping must assume that all errata documented for that stepping are present on all devices. Specification Changes are modifications to the current published specifications. These changes will be incorporated in any new release of the specification. Specification Clarifications describe a specification in greater detail or further highlight a specification's impact to a complex design situation. These clarifications will be incorporated in any new release of the specification. Documentation Changes include typos, errors, or omissions from the current published specifications. These will be incorporated in any new release of the specification. Note: Errata remain in the specification update throughout the product's life cycle, or until a particular stepping is no longer commercially available. Under these circumstances, errata removed from the specification update are archived and available upon request. Specification changes, specification clarifications, and documentation changes are removed from the specification update when the appropriate changes are made to the appropriate product specification or user documentation (datasheets, manuals, etc.).
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
Summary Table of Changes
Summary Table of Changes
The following table indicates the errata, specification changes, specification clarifications, or documentation changes which apply to the 28F800C3, 28F160C3, 28F320C3, 28F640C3 product. Intel may fix some of the errata in a future stepping of the component, and account for the other outstanding issues through documentation or specification changes as noted. This table uses the following notations:
Codes Used in Summary Table
Stepping
X: This erratum exists in the stepping indicated. Specification Change or Clarification that applies to this stepping.
(No mark) or (Blank box): This erratum is fixed in listed stepping, or specification change does not apply to listed stepping.
Page
(Page): Page location of item in this document.
Status
Doc: Plan Fix: Fixed: NoFix: Document change or update will be implemented. This erratum may be fixed in a future stepping of the product. This erratum has been previously fixed. There are no plans to fix this erratum.
Row
Change bar to left of table row indicates this erratum is either new or modified from the previous version of the document.
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Udpate
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Summary Table of Changes
Errata
Number 1 2 3 4 5 Page 10 10 11 12 14 Status Plan Fix Plan Fix Plan Fix Plan Fix Plan Fix Errata "28F320C3xC Maximum ICCE when Vpp=12V" "28F320C3xC Reset Failure"
"28F640C3xC Maximum ICCS and ICCD Change" "28F160C3xC Erase Resume Issue" "28F160C3xC and 28F640C3xC Lock/Unlock/Lock-Down Operation"
Specification Changes
8 Mb and 16Mb - 28F160C3 and 28F800C3
Number 1 2 3 Page 15 15 15 Maximum ICCD Change CFI Primary-Vendor Specific Extended Query Change Block Locking Command Sequence Change Specification Changes
32Mb - 28F320C3
Number 1 2 3 4 Page 15 15 15 16 Maximum ICCD Change CFI Primary-Vendor Specific Extended Query Change Block Locking Command Sequence Change 0.25m 32-Mb Maximum VCC Change Specification Changes
Specification Clarifications
Number N/A Page 17 Specification Clarifications None in this Specification Update revision
Documentation Changes
Number N/A Document Revision Page 17 Documentation Changes None in this Specification Update revision
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
Identification Information
Identification Information
Markings
The Finished Processing Order (FPO) number correlates to a specific device stepping as illustrated in the table below:
Stepping(1) A Stepping Identifier Ninth digit on topside FPO mark (third line) = anything
Note:
Device steppings are based on continuous improvements made in manufacturing and testing of the device and represent the current material shipped.
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Udpate
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Errata
Errata
1.
Problem:
28F320C3xC Maximum ICCE when Vpp=12V
When VPP=12V, ICCE Max on 28F320C3xC devices on the 0.18m deviates from the published specification and increases from 15mA to 25mA. The following is the revised specification for these products.
VPP Sym Parameter VCC/ VCCQ 11.4 V -12.6 V 2.7 V -3.6 V Typ ICCE VCC Erase Current 8 Max 25 mA VPP = VPP2 (12V), Erase in Progress Unit Test Conditions
Implication: Status:
The increased current requirements may result in increased power drawn from the power supply during limited 12 V production programming. 3 V programming is unaffected. 32-Mb devices on the 0.18mm process are affected.
2.
Problem: Implication: Workaround:
28F320C3xC Reset Failure
The 0.18m 28F320C3xC devices can unintentionally reset under certain conditions where VPP toggles. When the reset occurs, any command being executed is interrupted and the flash switches to read array mode. There are four workarounds for this erratum: 1) Tie VPP to VCC; 2) If the third and forth digits on the top side FPO mark (third line) is equal or greater than "23", then VCC may be set from 2.7v to 3.3v. VCC must not exceed 3.3v 3) Set VPP to a static high or static low level as shown here; and
Hold VPP Static
No restrictions on other waveforms
VPP CE# WE#
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
Errata
4) Wait 2 ms after a VPP transition to access the flash device, as shown here.
2 ms
2 ms
VPP CE# WE#
Status:
This erratum affects all 0.18m 28F320C3 devices. Root cause has been identified and this erratum may be fixed in a future stepping of the product.
3.
Problem:
28F640C3xC Maximum ICCS and ICCD Change
On the 0.18m 28F640C3xC devices, the maximum ICCS and ICCD deviates from the published specification and increases from 15 A to 20 A. The following table shows the revised ICCS and ICCD specifications.
VCC Sym Parameter VCCQ Note 2.7 V -3.6 V 2.7 V -3.6 V Type Max Unit Test Conditions
ICCS
VCC Standby Current
1,7
7
20
A
VCC = VCCMax CE# = RP# = VCCQ or during Program/ Erase Suspend WP# = VCCQ or GND VCC = VCCMax VCCQ = VCCQMax VIN = VCCQ or GND RP# = GND 0.2 V
ICCD
VCC Deep Power-Down Current
1,7
7
20
A
NOTE: 1. All currents are in RMS unless otherwise noted. Typical values at nominal VCC, TA = +25 C. 2. The test conditions VCCMax, VCCQMax, VCCMin, and VCCQMin refer to the maximum or minimum VCC or VCCQ voltage listed at the top of each column.
Implication: Workaround: Status:
The increased current requirements may result in a nominal increase in power drawn from the power supply. None This erratum affects all 0.18m 28F640C3xC devices. Root cause has been identified and this erratum may be fixed in a future stepping of the product.
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Udpate
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Errata
4.
Problem:
28F160C3xC Erase Resume Issue
On the 0.18m 28F160C3xC devices, a design anomaly was discovered. During an Erase-Suspend operation, if the Program (40H/10H) sequence is executed, under limited conditions the proceeding Erase Resume command (D0H) may not actually resume the device. No customers have reported failures in product applications. Customers who use any version of FDI (Intel Flash Data Integrator) software will not see this issue. If the Read Array command is issued prior to the Erase Resume command, users will not see the issue (typical in XIP applications). The Resume Command (D0H) may be ignored by the device and will not correctly resume. The device will appear to remain in suspend (via status register). After a reset of the flash device the status register will clear. This failure has been recreated in a lab environment only. There are 2 workarounds for this erratum. 1. If FDI (Intel Flash Data Integrator) software is used, users will not see the issue. 2. During an Erase-Suspend (B0H), user must issue any of the following commands after issuing the Program (40H/10H) and data sequence but before issuing the Erase-Resume (D0H) command.
First Bus Cycle Command Oper Addr Data Oper Addr Data Second Bus Cycle
Implication:
Workaround:
Read Array Read Configuration Read Query Read Status Register Clear Status Register Program/Erase Suspend Unlock Block
PA: Program Address IA: Identifier Address
Write Write Write Write Write Write Write
QA: Query Addr ID: Identifier Data
X X X X X X X
FFH 90H 98H 70H 50H B0H 60H
BA: Block Address
Read Read Read
IA QA X
ID QD SRD
Write
QD: Query Data
BA
D0H
SRD: Status Register Data
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
Errata
Figure 1. Workaround Placement
Erase Suspend/Resume Flow chart
Standard Sequence
Pass Sequence
start
start
Erase Suspend (B0H) Any Valid Operation(s) Program (40H/10H) and Data
Erase Suspend (B0H)
Program (40H/10H) and Data
EraseResume (D0H)
Erase may not Resume
Workaround commands: FFH 50H 60H + D0H 70H 90H 98H B0H
ISSUEHERE
EraseResume (D0H)
EraseResumed
Status:
Root cause has been identified. New material will be available in August 2002.
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Udpate
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Errata
5.
Problem:
28F160C3xC and 28F640C3xC Lock/Unlock/Lock-Down Operation
On the 16Mb and 64Mb 0.18m devices, if CE# is deasserted after any block lock operation and before the next write sequence, the part may perform the same operation on additional blocks. (See waveform below.)
CE# WE# 0x60 0x2F
Implication: Workaround:
When CE# is deasserted after performing a block lock operation to a specific block and prior to the next write sequence, other blocks may perform the same operation. Depending on software implementation, systems may already be effectively managing this erratum. There is currently a workaround for this erratum: Immediately after performing a block lock, unlock, or lock-down operation, perform a valid write sequence before chip enable (CE#) is deasserted. For example, one possible solution is shown below: 1) Assert CE# and toggle WE# to write the block lock setup command (0x60). 2) Toggle WE# a second time to write the confirm command (lock = 0x01; unlock = 0xD0; lockdown = 0x2F). 3) Toggle WE# a third time (ex: 0xFF- Read Array) before CE# is deasserted. (See waveform below.) Any other valid write sequence will also work (i.e., 0x90 - Read Configuration, 0x40 Program, 0x20 - Erase).
CE# WE# 0x60 0x2F (0xFF)
Status:
16Mb and 64Mb devices on the 0.18m process are affected. Root cause has been identified and this erratum may be fixed in a future stepping of the product.
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
Specification Changes
Specification Changes
1.
Issue:
Maximum ICCD Change
The maximum ICCD increases from 20 A to 25 A on 0.25m 8-Mb, 16-Mb and 32-Mb versions only. The following table shows the revised ICCD specification.
VCC Sym Parameter VCCQ Note 2.7 V -3.6 V 2.7 V -3.6 V Type Max Unit Test Conditions
ICCD
VCC Deep Power-Down Current
1,7
7
25
A
VCC = VCCMax VCCQ = VCCQMax VIN = VCCQ or GND RP# = GND 0.2 V
NOTE: 1. All currents are in RMS unless otherwise noted. Typical values at nominal VCC, TA = +25 C. 2. The test conditions VCCMax, VCCQMax, VCCMin, and VCCQMin refer to the maximum or minimum VCC or VCCQ voltage listed at the top of each column.
2.
Issue:
CFI Primary-Vendor Specific Extended Query Change
The value for address 3A in the CFI Primary-Vendor Specific Extended Query Table (Optional Feature and Command Support) has been changed from 0Eh to 66h.
Length (bytes) 8-Mbit, 16-Mbit, 32-Mbit 3A: 66 3B: 00 3C: 00 3D: 00
Offset(1)
Description
(P+5)h
04h
Optional Feature & Command Support bit 0 Chip Erase Supported bit 1 Suspend Erase Supported bit 2 Suspend Program Supported bit 3 Legacy Lock/Unlock Supported) bit 4 Queued Erase Supported bit 5 IBL Supported (2) bit 6 OTP Bits Supported (3) bit 7 Page Mode Reads Supported bit 8 Synchronous Burst Supported bits 9-31 reserved for future use; undefined bits are "0" (1=yes, 0=no) (1=yes, 0=no) (1=yes, 0=no) (1=yes, 0=no) (1=yes, 0=no) (1=yes, 0=no) (1=yes, 0=no) (1=yes, 0=no) (1=yes, 0=no)
NOTES: 1. The variable P is a pointer that is defined at offset 15H Table D5 2. IIBL refers to "Instant, Individual Block Locking." 3. OTP refers to "One Time Programmable."
CFI templates that support the Advanced+ Boot Block features will recognize block locking and unlocking support on affected devices. The CFI Primary-Vendor Specific Extended Query Table will be corrected on future steppings.
3.
Issue:
Block Locking Command Sequence Change
A Read Status Register command must be issued following an Unlock Block command to a block that is in the Lockdown or Locked-Lockdown state. WP# must be held valid for all three bus
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Udpate
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Specification Changes
cycles. See the 3 Volt Advanced+ Boot Block Flash Memory datasheet for a description of the Lockdown and Locked-Lockdown states.
First Bus Cycle Command Notes Oper Addr Data Oper Addr Data Oper Addr Data Second Buss Cycle Third Bus Cycle
Unlock Block
4
Write
X
60H
Write
BA
D0H
Write
X
70H
Customers may need to modify their software. Note: If the Locking Operations Flowchart (Figure 16 in the datasheet) is implemented for locking operations with WP# held valid through the Read Status Register command, software modifications are not necessary. Future steppings will require WP# valid only through the Write Lock, Unlock, or Lockdown commands.
4.
Issue:
0.25m 32-Mb Maximum VCC Change
The maximum VCC decreases from 3.6 V to 3.3 V on 0.25m 32-Mb versions only. The following table shows the revised VCC specification.
Symbol Parameter Notes Min Max Units
VCC
VCC Supply Voltage
1
2.7
3.3
Volts
Other implied specification changes, as a result of the VCC change, are described in the following table:
Symbol Parameter Notes Min Max Units
VCC1 VCC2 VCCQ1 VPP1
VCC Supply Voltage VCC Supply Voltage I/O Supply Voltage Supply Voltage
1 1 1 1
2.7 3.0 2.7 1.65
3.3 3.3 3.3 3.3
Volts Volts Volts Volts
NOTE: 1. VCC and VCCQ must share the same the same supply when they are in the VCC1 range.
The maximum VCC has changed on the 0.25m 32-Mb devices. The maximum VCC specification has not changed on the 16-Mb, 8-Mb. This may become an issue if the system voltage regulator used has a VCC range tolerance that is outside the new specification, which may cause the device to operate in a condition which is outside the specifications of the current datasheet.
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update
Specification Clarifications
Specification Clarifications
There are no specification clarifications in this Specification Update revision.
Documentation Changes
There are no documentation changes in this Specification Update revision.
28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Udpate
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Documentation Changes
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28F800C3, 28F160C3, 28F320C3, 28F640C3 Specification Update

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